Parallel Partial Order Reduction with Topological Sort Proviso
| Authors | |
|---|---|
| Year of publication | 2010 |
| Type | Article in Proceedings |
| Conference | Software Engineering and Formal Methods (SEFM 2010) |
| MU Faculty or unit | |
| Citation | |
| Field | Informatics |
| Keywords | LTL Model Checking; Partial Order Reduction; Parallel and Distributed Processing; DiVinE |
| Description | Partial order reduction and distributed-memory processing are the two essential techniques to fight the wellknown state space explosion problem in explicit state model checking. Unfortunately, these two techniques have not been integrated yet to a satisfactory degree. The main source of difficulties is the cycle proviso that requires one fully expanded state on every cycle in the reduced state space graph. In this paper we suggest a new technique that guarantees correct construction of the reduced state space graph w.r.t. the cycle proviso. Our new technique is fully compatible with the parallel graph traversal procedure while at the same time it provides competitive reduction of the state space if compared to the serial case. The new technique has been implemented within the parallel and distributed-memory LTL model checker DIVINE and its performance is reported in this paper. |
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